thick film resistor array www.vishay.com for technical questions , contact: ff3aresistors@vishay.com document number: 31043 248 revision: 23-jan-07 cra04s vishay the cra04s thick film resistor array is constructed on a high grade ceramic body with convex terminations. a small package enables the design of high density circuits. the single component reduces board space, component counts, and assembly costs. features ? convex terminal array with square corners ? wide ohmic ramge: 10r to 1m0 ? 4 or 8 terminal package with isolated resistors ? lead (pb)-free solder contacts on ni barrier layer ? pure tin plating provides compatibility with lead (pb)-free and lead containing soldering processes ? compatible with ?restriction of the use of hazardous substances? (rohs) directive 2002/95/ec (issue 2004) notes 1. rated voltage: 2. the power dissipation on the resistor generates a temperature rise against the lo cal ambient, depending on the heat flow supp ort of the printed-circuit board (thermal re sistance). the rate dissipation ap plies only if the permi tted film temperature of 155 c is no t exceeded. notes 1. preferred way for ordering products is by use of the part number. 2. please refer to the table packaging, see next page. standard electrical specifications model circuit power rating p 70 c w limiting element voltage max. v ? temperature coefficient ppm/k tolerance % resistance range e-series cra04s 03 0.063 50 100 1 10r - 1m0 24 + 96 200 2; 5 24 zero-ohm-resistor: r max 50 m , i max = 1 a technical specifications parameter unit cra04s rated dissipation at 70 c 2) w per element 0.063 limiting element voltage 1) v ? 50 insulation voltage (1 min) v dc/ac peak 100 category temperature range c - 55/+ 125 (+ 155) insulation resistance > 10 9 part number and product despription part number: cra04s08347k0jtd 1) model terminal style pin circuit value tolerance packaging 2) special cra04 s 04 08 3 = 03 r = decimal k = thousand m = million 0000 = 0 jumper f = 1 % g = 2 % j = 5 % z = 0 jumper td tc pz up to 2 digits product description: cra04s 08 03 473 j rt7 e3 cra04s 08 03 473 j rt7 e3 model terminal count circuit type resistance value tolerance packaging 2) lead (pb)-free cra04s 04 08 03 473 = 47 k 4702 = 47 k 10r0 = 10 100 = 10 000 = 0 jumper f = 1 % g = 2 % j = 5 % z = 0 jumper rt7 rt6 pz e3 = pure tin termination finish first two digits (3 for 1 %) are significant. last digit is the multiplier. pr a04s 834 0 cr jd k 0t 7
document number: 31043 for technical questi ons, contact: ff3ares istors@vishay.com www.vishay.com revision: 23-jan-07 249 cra04s thick film resistor array vishay circuit dimensions the dimensions shown are for a 8 pin part. for parts with different pin numbers use the same pitch and add or substract pads as required. packaging model tape width diameter pitch pieces/reel packaging code pa pe r ta p e part number product description cra04s 8 mm 180 mm/7" 2 mm 10 000 td rt7 330 mm/13" 2 mm 20 000 tc rt6 330 mm/13" 2 mm 50 000 pz pz 03 circuit 4 pin 8 pin 120 rated power in % 100 8 0 60 40 20 0 derating - 55 - 25 0 25 50 75 100 125 150 175 70 ambient temperature in c ae e pin no# dimensions [in millimeters] la a 1 bb* p nom tw 4 1.0 0.1 - 0.33 0.15 0.25 0.65 0.35 1.0 8 2.0 0.2 0.30 0.4 0.15 0.25 0.50 0.45 1.0 tol . - 0.15 0.15 0.10 0.1 - 0.1 0.15 solder pad dimensions [in millimeters] cwdabe wave 0.45 1.0 0.2 0.4 0.5 0.3
www.vishay.com for technical questions , contact: ff3aresistors@vishay.com document number: 31043 250 revision: 23-jan-07 cra04s vishay thick film resistor array notes 1. figures are given for a single element. 2. solderability is specified for 2 y ears after production or requalification. permitted storage time is 20 years. test procedures and requirements en 60115-1 test (clause) conditions of test requirements permissible change ( r / r ) 1) stability class 1 or better stability class 2 or better stability for product types: 10 to 1 m 10 to 1 m cra04s resistance (4.5) - 1 % 2 %; 5 % temperature coefficient (4.8.4.2) 20/- 55/20 c and 20/125/20 c 100 ppm/k 200 ppm/k overload (4.13) u = 2.5 ( p 70 x r ) 1/2 2 x u max ; 0.5 s (0.25 % r + 0.05 ) (0.5 % r + 0.05 ) solderability (4.17.5) 2) aging 4 h at 155 c, dryheat solder bath method; 235 c; 2 s visual examination good tinning ( 95 % covered) no visible damage resistance to soldering heat (4.18.2) solder bath method; (260 5) c; (10 1) s (0.25 % r + 0.05 ) (0.5 % r + 0.05 ) rapid change of temperature (4.19) 30 min. at lct = - 55 c; 30 min. at uct = 125 c; 5 cycles (0.25 % r + 0.05 ) (0.5 % r + 0.05 ) damp heat, steady state (4.24) (40 2) c; 56 days; (93 3) % rh (1 % r + 0.05 ) (2 % r + 0.1 ) climatic sequence (4.23) 16 h at uct = 125 c; 1 cycle at 55 c; 2 h at lct = - 55 c; 1 h/1 kpa at 15 c to 35 c; 5 cycles at 55 c u = ( p 70 x r ) 1/2 u = u max ; whichever is less severe (1 % r + 0.05 ) (2 % r + 0.1 ) endurance at 70 c (4.25.1) u = ( p 70 x r ) 1/2 u = u max ; whichever is less severe 1.5 h on; 0.5 h off; 70 c; 1000 h (1 % r + 0.05 ) (2 % r + 0.1 ) extended endurance (4.25.1.8) duration extended to 8000 hours (2 % r + 0.1 ) (4 % r + 0.1 ) endurance at upper category temperature (4.25.3) uct = 125 c; 1000 h (1 % r + 0.05 ) (2 % r + 0.1 ) applicable specifications ? en 60115-1 generic specification ? en 140400 sectional specification ? en 140401-802 detail specification ? iec 60068-2-x variety of environmental test procedures ? eia 481 packaging of smd components
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